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VISHAY
TFBS5711
Vishay Semiconductors
Fast Infrared Transceiver Module (MIR, 1.152 Mbit/s) for IrDA(R) applications
Description
The TFBS5711 is an infrared transceiver module compliant to the latest IrDA physical layer standard for fast infrared data communication, supporting IrDA speeds up to 1.152 Mbit/s (MIR), HP-SIR(R), Sharp ASK(R) and carrier based remote control modes up to 2 MHz. Integrated within the transceiver module are a PIN photodiode, an infrared emitter (IRED), and a low-power control IC to provide a total front-end solution in a single package.
18508
The transceivers are capable of directly interfacing with a wide variety of I/O devices, which perform the modulation/ demodulation function. At a minimum a serial resistor for current control is the only external component required in implementing a complete solution. TFBS5711 has a tri-state output and is floating in shut-down mode with a weak pull-up.
Applications
* Telecommunication Products (Cellular Phones, Pagers) * Digital Still and Video Cameras * Printers, Fax Machines, Photocopiers, Screen Projectors * Medical and Industrial Data Collection * Notebook Computers, Desktop PCs, Palmtop Computers (Win CE, Palm PC), PDAs * Internet TV Boxes, Video Conferencing Systems * External Infrared Adapters (Dongles) * Kiosks, POS, Point and Pay Devices including IrFM - Applications
Features
* Compliant to the latest IrDA physical layer low power specification (up to 1.152 Mbit/s) and TV Remote Control * Operates from 2.7 V to 5.5 V within specification * Industries smallest footprint - 6.0 mm length - 1.9 mm height * Low Power Consumption (typ. 0.55 mA Supply Current in receive mode, no signal) * Power Shutdown Mode (< 5 A Shutdown Current in Full Temperature Range, up to 85 C) * Surface Mount Package, low profile (1.9 mm) Universal (L 6.0 mm x W 3.1 mm x H 1.9 mm) * Directly Interfaces with Various Super I/O and Controller Devices * Tri-state-Receiver Output, floating in shut down with a weak pull-up * Split power supply, transmitter and receiver can be operated from two power supplies with relaxed requirements saving costs, US - Patent No. 6,157,476 * Only One External Component Required * TV Remote Control supported
Document Number 82634 Rev. 1.3, 05-Dec-03
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TFBS5711
Vishay Semiconductors
VISHAY
Parts Table
Part TFBS5711-TR1 TFBS5711-TR3 Description Oriented in carrier tape for side view surface mounting Oriented in carrier tape for side view surface mounting 1000 pcs 2500 pcs Qty / Reel
Functional Block Diagram
Vcc1 Tri-State Driver Amplifier Comparator
Rxd
Vcc2
SD Txd
Logic &
Control
Controlled Driver
GND
18512
Pinout
TFBS5711 weight 50 mg
Definitions:
In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes: SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhy 1.0 MIR: 576 kbit/s to 1152 kbit/s FIR: 4 Mbit/s VFIR: 16 Mbit/s MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy 1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the Low Power Option to MIR and FIR and VFIR was added with IrPhy 1.4.A new version of the standard in any case obsoletes the former
1
18466
2
3
4
5
6
version. With introducing the updated versions the old versions are obsolete. Therefore the only valid IrDA standard is the actual version IrPhy 1.4 (in Oct. 2002).
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Document Number 82634 Rev. 1.3, 05-Dec-03
VISHAY
TFBS5711
Vishay Semiconductors
Pin Description
Pin Number 1 Function VCC2 IRED Anode Txd Description Connect IRED anode directly to be the power supply (VCC2). An external resistor is necessary for controlling the IRED current. A separate unregulated power supply can be used at this pin. This Schmitt-Trigger input is used to transmit serial data when SD is low. An on-chip protection circuit disables the LED driver if the Txd pin is asserted for longer than 80 s. When used in conjunction with the SD pin, this pin is also used to control receiver output pulse duration. Received Data Output, push-pull CMOS driver output capable of driving standard CMOS or TTL loads. No external pull-up or pulldown resistor is required. Floating with a weak pull-up of 500 k (typ.) in shutdown mode. Shutdown, also used for setting the output pulse duration. Setting this pin active for more than 1.5 ms places the module into shutdown mode. Before that (t < 0.7 ms) on the falling edge of this signal, the state of the Txd pin is sampled and used to set the receiver output to long pulse duration (2 s) or to short pulse duration (0.4 s) mode Supply Voltage Ground I HIGH I/O Active
2
3
Rxd
O
LOW
4
SD
I
HIGH
5 6
VCC1 GND
Absolute Maximum Ratings
Reference point Ground (Pin 6) unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage range, transceiver Supply voltage range, transmitter Input currents Output sinking current Power dissipation Junction temperature Ambient temperature range (operating) Storage temperature range Soldering temperature Average output current, pin 1 Repetitive pulsed output current, pin 1 IRED anode voltage, pin 1 Voltage at all inputs and outputs Vin < VCC1 is allowed Load at mode pin when used as mode indicator t < 90 s, ton < 20 % see recommended solder profile IIRED(DC) IIRED(RP) VIREDA Vin - 0.5 - 0.5 see derating curve PD TJ Tamb Tstg - 25 - 25 Test Conditions - 0.3 V < VCC2 < 6 V - 0.5 V < VCC1 < 6 V for all pins, except IRED anode pin Symbol VCC1 VCC2 Min - 0.3 - 0.3 Typ. Max + 6.0 + 6.5 10 25 500 125 + 85 + 85 240 125 600 + 6.5 + 5.5 50 Unit V V mA mA mW C C C C mA mA V V pF
Document Number 82634 Rev. 1.3, 05-Dec-03
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TFBS5711
Vishay Semiconductors Eye safety information
Parameter Virtual source size Maximum intensity for class 1 Test Conditions Method: (1-1/e) encircled energy IEC60825-1 or EN60825-1, edition Jan. 2001, operating below the absolute maximum ratings Symbol d Ie Min 1.3 Typ. 1.5
*)
VISHAY
Max
Unit mm mW/sr
(500)
**)
*)
Due to the internal limitation measures the device is a "class 1" device. IrDA specifies the max. intensity with 500 mW/sr.
**)
Electrical Characteristics Transceiver
Tamb = 25 C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage Dynamic supply current Average dynamic supply current, transmitting Standby supply current SD = Low, Ee = 1 klx IIRED = 500 mA, 25 % Duty Cycle SD = High, T = 25 C, Ee = 0 klx SD = High, T = 25 C, Ee = 1 klx*) SD = High, T = 85 C, not ambient light sensitive Operating temperature range Output voltage low, Rxd Output voltage high, Rxd Rxd to VCC1 impedance Input voltage low (Txd, SD) Input voltage high (Txd, SD) CMOS level
**)
Test Conditions
Symbol VCC1 ICC ICC ISD ISD ISD TA
Min 2.7
Typ. 550 1100
Max 5.5 900 1500 1 2.5 5
Unit V A A A A A C V V V
- 25 0.8 x VCC1 0.9 x VCC1 400 - 0.5 VCC1 - 0.5 -2 500
+ 85 0.4
CLoad = 15 pF, IOL = 1 mA IOH = - 500 A IOH = - 250 A, CLoad = 15 pF
VOL VOH VOH RRxd VIL VIH IICH IIRTx IIRTx CIN -1 0
600 0.5 VCC1 + 0.5 +2 + 150 1 5
k V V A A A pF
Input leakage current (Txd, SD) Vin = 0.9 x VCC1 Controlled pull down current SD, Txd = "0" to "1", 0 < Vin < 0.15 VCC1 SD, Txd = "0" to "1", Vin > 0.7 VCC1 Input capacitance (Txd, SD)
*)
Standard illuminant A The typical threshold level is 0.5 x VCC1. It is recommended to use the specified min/max values to avoid increased operating current.
**)
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Document Number 82634 Rev. 1.3, 05-Dec-03
VISHAY
Optoelectronic Characteristics Receiver
Tamb = 25 C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Minimum detection threshold irradiance Maximum detection threshold irradiance Logic LOW receiver input irradiance Rise time of output signal Fall time of output signal 10 % to 90 %, CL = 15 pF 90 % to 10 %, CL = 15 pF Test Conditions 9.6 kbit/s to 1152 kbit/s = 850 nm - 900 nm = 850 nm - 900 nm Symbol Ee Ee Ee tr(Rxd) tf(Rxd) tPW tPW 4 (0.4) 20 20 300 1.7 400 2.0 Min Typ. 100 (10) 5 (500)
TFBS5711
Vishay Semiconductors
Max 150 (15)
Unit mW/m2 (W/cm 2) kW/m2 (mW/cm2) mW/m2 (W/cm 2)
60 60 500 2.9
ns ns ns s
Rxd pulse width of output signal, input pulse length default mode after power on tPWopt > 200 ns SIR ENDEC compatibility mode*): Rxd pulse width of output signal Stochastic jitter, leading edge input pulse length tPWopt > 200 ns, see chapter "Programming" input irradiance = 100 mW/m2, 1.152 Mbit/s, 576 kbit/s input irradiance = 100 mW/m2, 115.2 kbit/s Standby /Shutdown delay Shutdown active time window for programming after shutdown active or (SD low to high transition) During this time the pulse duration of the output can be programmed to the application mode. see chapter "Programming"
80 350 0.6 1.5 600
ns ns ms s
Receiver start up time power on after shutdown inactive (SD high delay shutdown recovery delay to low transition) and after power-on Latency
*)
300
s
tL
200
s
Some ENDECs are not able to decode short pulses as valid SIR pulses. Therefore this additional mode was added in TFDU5307. TFDU5307 is set to the "short output pulse" as default after power on, also after recovering from the shutdown mode (SD must have been longer active than 1.5 ms). For mode changing see the chapter "Programming"
Document Number 82634 Rev. 1.3, 05-Dec-03
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TFBS5711
Vishay Semiconductors Transmitter
Tamb = 25 C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Test Conditions Symbol ID Min Typ. 400 Max 500
VISHAY
Unit mA
VCC2 = 3.3 V: RS = 2.0 IRED operating current, recommended serial resistor for VCC2 = 5.0 V: RS = 5.6 MIR applications Output leakage IRED current Output radiant intensity recommended application circuit, see figure 1 Output radiant intensity Txd = 0 V, 0 < VCC1 < 5.5 V IF = 250 mA, = 0 , = 15 , VCC2 = 2.7 V, Txd = High, SD = Low VCC1 = 5.0 V, = 0 , 15 Txd = Low or SD = High (Receiver is inactive as long as SD = High)
IIRED Ie
-1 10 25
1
A mW/sr
Ie
0.04
mW/sr
Output radiant intensity, angle of half intensity Peak - emission wavelength*) Spectral bandwidth Optical rise time, fall time Optical output pulse duration input pulse width 217 ns, 1.152 Mbit/s input pulse width tTxd < 80 s input pulse width tTxd 80 s Optical overshoot
*)
p tropt, tfopt topt topt topt 10 200 20 20 880
24 900 45 40 217 240 tTxd 85 25
nm nm ns ns s s %
Note: Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for the standard Remote Control applications with codes as e.g. Phillips RC5/RC6(R) or RECS 80. With the typical specified intensity an RC operating range of about 4 m can be expected.
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Document Number 82634 Rev. 1.3, 05-Dec-03
VISHAY
Recommended Circuit Diagram for IrDA(R) and Remote Control Operation
In general Vishay transceivers are using the identical circuit for IrDA and Remote Control operation. For using the IrDA transceiver as an RC transmitter no change of the operating circuit is necessary. Used with a clean low impedance power supply the TFBS5711 only needs an external series current limiting resistor. However, depending on the entire system design and board layout, additional external components may be required (see figure 1).
TFBS5711
Vishay Semiconductors
and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long, resistive and inductive wiring should be avoided. The inputs (Txd, SD) and the output Rxd should be directly (DC) coupled to the I/O circuit. The capacitor C2 combined with the resistor R2 is the low pass filter for smoothing the supply voltage. R2, C1 and C2 are optional and dependent on the quality of the supply voltages V1 and V2 and injected noise. An unstable power supply with dropping voltage during transmission may reduce the sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 as close as possible to the transceiver power supply pins. An Tantalum capacitor should be used for C1 while a ceramic capacitor is used for C2. In addition, when connecting the described circuit to the power supply, low impedance wiring should be used. When extended wiring is used the inductance of the power supply can cause dynamically a voltage drop at V2. Often some power supplies are not apply to follow the fast current rise time. In that case another 4.7 F (type, see table under C1) at V2 will be helpful. Under extreme EMI conditions as placing an RFtransmitter antenna on top of the transceiver, we recommend to protect all inputs by a low-pass filter, as a minimum a 12 pF capacitor, especially at the Rxd port. Keep in mind that basic RF - design rules for circuit design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. "The Art of Electronics" Paul Horowitz, Winfield Hill, 1989, Cambridge University Press, ISBN: 0521370957.
V2 V1 C1
GND
R1 R2 C3 C2
IRED Anode V cc2 V cc1
Ground
SD Txd Rxd
SD Txd Rxd
18560
Figure 1. Recommended Application Circuit
The capacitor C1 is buffering the supply voltage and eliminates the inductance of the power supply line. This one should be a Tantalum or other fast capacitor to guarantee the fast rise time of the IRED current. The resistor R1 is the current limiting resistor and this is supply voltage dependent, see derating curve in figure 4, to avoid too high internal power dissipation. Vishay's transceivers integrate a sensitive receiver
Table 1. Recommended Application Circuit Components
Component C1 C2 R1 Recommended Value 4.7 F, 16 V 0.1 F, Ceramic 5 V supply voltage: 5.6 s. text 0.25 W (recommended using two 2.8 , 0.125 W resistors in series). 3.3 V supply voltage: 2.0 s. text 0.25 W 47 , 0.125 W Vishay Part Number 293D 475X9 016B VJ 1206 Y 104 J XXMT e.g. 2 x CRCW-1206-2R0-F-RT1 for 3.3 V supply voltage
R2
CRCW-1206-47R0-F-RT1
Document Number 82634 Rev. 1.3, 05-Dec-03
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TFBS5711
Vishay Semiconductors I/O and Software
In the description, already different I/Os are mentioned. Different combinations are tested and the function verified with the special drivers available from the I/O suppliers. In special cases refer to the I/ O manual, the Vishay application notes, or contact directly Vishay Sales, Marketing or Application.
VISHAY
4. After waiting th 200 ns Txd can be set to logic "LOW". The hold time of Txd is limited by the maximum allowed pulse length. After that Txd is now enabled as normal Txd input and the Rxd output is set for the short Rxd - pulse duration mode. The timing of the pulse duration changing procedure is quite uncritical. However, the whole change must not take more than 600 s. See in the spec. "Shutdown Active Time Window for Programming"
Programming Pulse duration Switching
After Power-on the TFBS5711 is in the default short Rxd pulse duration mode. Some ENDECs are not able to decode short pulses as valid SIR pulses. Therefore an additional mode with extended pulse duration (same as in standard SIR transceivers) is added in TFBS5711. TFBS5711 is set to the "short output pulse" as default after power on, and after recovering from the shutdown mode (SD being active longer than 1.5 ms). To switch the transceivers from the short Rxd pulse duration mode to the long pulse duration mode and vice versa, follow the procedure described below.
SD ts TxD 50%
50% th High: 50% Low:
2 s 400 ns
18150
Setting to the ENDEC compatibility mode with an Rxd pulse duration of 2 s
1. Set SD input to logic "HIGH". 2. Set Txd input to logic "HIGH". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of Txd, which determines speed setting). 4. After waiting th 200 ns. After that Txd is enabled as normal Txd input and the Rxd output is set for the longer Rxd - pulse duration mode.
Figure 2. Timing Diagram for changing the output pulse duration
Simplified Method
Setting the device to the long pulse duration is simply applying a short active (less than 600 s) pulse to SD (Txd = Low). In any case a short SD pulse will force the device to leave the default mode and go the compatibility mode. Vice versa applying a 1.5 ms (minimum) pulse at SD will cause the device to go back to the default mode by activating a power-on-reset and setting the device to the default short pulse mode. This simplified method takes more time but may be easier to handle.
Setting back to the default mode with a 400 ns pulse duration
1. Set SD input to logic "HIGH". 2. Set Txd input to logic "LOW". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of Txd, which determines speed setting).
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Document Number 82634 Rev. 1.3, 05-Dec-03
VISHAY
TFBS5711
Vishay Semiconductors
Table 2. Truth table
Inputs SD high < 600 s high > 1.5 ms low low low Txd x x high high > 80 s low Optical input Irradiance mW/m x x x x <4
2
Outputs Rxd weakly pulled (500 k) to VCC1 weakly pulled (500 k) to VCC1 high inactive high inactive high inactive Transmitter 0 0 Ie 0 0
Remark Operation Time window for pulse duration setting Shutdown Transmitting Protection is active Ignoring low signals below the IrDA defined threshold for noise immunity Response to an IrDA compliant optical input signal
low
low
> Min. Detection Threshold Irradiance < Max. Detection Threshold Irradiance > Max. Detection Threshold Irradiance
low (active)
0
low
low
undefined
0
Overload conditions can cause unexpected outputs
Dry packing
The reel is packed in a moisture proof aluminum bag to protect the device from absorbing moisture during transportation and storage.
Recommended Method of Storage
Dry box storage is recommended as soon as the dry bag has been opened to prevent moisture absorption. The following conditions should be observed, if dry boxes are not available:
Aluminiumbag
Moisture Level Sticker BarCode ESD Sticker Label
This bag contains MOISTURE -SENSITIVE DEVICES
CAUTION
LEVEL
4
1. Shelf life in sealed bag 12 months at <40C and < 90% relative humidity (RH) 2. After this bag is opened devices that will be subjected to infrared reflow, vapor-phase reflow, or equivalent processing (peak package body temp. 220C) must be: 2a.Mounted within 72 hours at factory condition of < 30C/60%RH or 2b.Stored at <20% RH. 3. Devices require baking before mounting if: Humidity Indicator Card is >20% when read at 23C + 5C or 2a or 2b is not met.
0 Reel
18298
4. If baking is required, devices may be baked for: 192 hours at 40C + 5C/-0C and <5%RH (dry air/nitrogen) or For all device containers or 96 hours at 605oCand <5%RH Not suitable for reels or tubes 24 hours at 1255C Bag Seal Date: ______________________________ (If blank, see bar code label) Note: LEVEL defined by EIA JEDEC Standard JESD22-A113
18299
Acc. to JEDEC Standard JESD22-A113
Document Number 82634 Rev. 1.3, 05-Dec-03
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TFBS5711
Vishay Semiconductors Recommended Solder Profile Current Derating Diagram
VISHAY
240 220 200 180
Temperature ( C )
10 s max. @ 230C 2C - 4C/s
Figure 4 shows the maximum operating temperature when the device is operated without external current limiting resistor. A minimum resistor of 2 Ohms is recommended from the anode of the IRED to VCC.
160 120 100 80 60 40 20 0 0 50 100 150 200 250 300 350 2C - 4C/s 120 s - 180 s 90 s max
Ambient Temperature ( C)
90 85 80 75 70 65 60 55 50 2.0
18097
140
14874
Time ( s )
Figure 3. Recommended Solder Profile
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Operating Voltage [V] @ duty cycle 20%
Figure 4. Temperature Derating Diagram
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Document Number 82634 Rev. 1.3, 05-Dec-03
VISHAY
Package Dimensions in mm (Inches)
TFBS5711
Vishay Semiconductors
6.00 (0.236)
1.90 (0.075) EMITTER
DETECTOR
3.81 (0.150)
3.10 (0.122)
0.66 (0.026) 1.65 (0.065)
PIN 1
0.95 (0.037) (5 PLCS) TOL NON CUM 0.62 (0.025) 0.42 (0.017) 0.10 0.05 (0.004 0.002) 0.58 (0.023) (6 PLCS) 0.34 (0.013) (6 PLCS)
ISO Method A
0.95 (0.037) 1 0.81 (0.032)
RECOMMENDED FOOTPRINT TOP VIEW 2 3 4 5 6
0.64 [0.025]
1.74 [0.068]
EMITTER
18467
DETECTOR
Document Number 82634 Rev. 1.3, 05-Dec-03
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TFBS5711
Vishay Semiconductors Reel Dimensions
VISHAY
W1
Reel Hub
W2
14017
Tape Width mm 16
A max. mm 330
N mm 50
W1 min. mm 16.4
W2 max. mm 22.4
W3 min. mm 15.9
W3 max. mm 19.4
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Document Number 82634 Rev. 1.3, 05-Dec-03
VISHAY
Tape Dimensions in mm
TFBS5711
Vishay Semiconductors
18297
Document Number 82634 Rev. 1.3, 05-Dec-03
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TFBS5711
Vishay Semiconductors Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements.
VISHAY
2. Regularly and continuously improve the performance of our products, processes, distribution and operatingsystems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
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Document Number 82634 Rev. 1.3, 05-Dec-03

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